Andrew's Blog: May 2021

Wednesday, May 12, 2021

work/GCC update

New Beginings

It has been exactly 10 years since I wrote my last blog entry. A lot of things have happened during those last 10 years. In this entry I am only going to write about work and GCC updates. In my next entry I will write about personal stuff. I will be update this blog more regularly now too.

Job update

So first off I have not been with Sony for the last 11 years even. Started to work at Cavium in Feb 2010 and then they acquired by Marvell in July 2018.

Work details

This is just a summary of what work has been done in the last 11 years but is no where near complete.

GDB stub

Started at Cavium by re-writing the debug stub for an embedded bare metal environment that was able to handle connecting over PCI (X or e depending on the SoC version). This rewrite was done for a few reasons. It was a good experience into MIPS64 code writing even and learning about the MIPS64 ISA.

Coremarks benchmarking

Like most places, performance is #1 priority so looked into coremark benchmarks (a shitty benchmark which I might go into details in another entry on why). The main thing I looked at here was improvements using the conditional move instructions for the Octeon SoCs. Some of the improvements went upstream to GCC; e.g. expanding improvements of using conditional move RTL directly from the COND_EXPR gimple. A few other changes still need to be rewritten and pushed upstream (they help AARCH64 in the end).

Dual-endian support

A Customer requested we support a similar extension to GCC that Intel has with respect to supporting the opposite endian support. This was done and completed and had their application fully running. All of it was thrown away as the customer never used it and a different mechism made it upstream to GCC (scalar_storage_order).

AARCH64 ILP32 support

This was a big project. With help from ARM, we implemented a new ABI inside GCC, glibc, binutils, gdb, and the Linux kernel. All of the patches were posted upstream but the linux kernel and glibc support was never accepted because interest was just not there and there kept on being difference of opinions on what time_t should be; 32bit vs 64bit.

Really wish some company would have picked this up, oh well.

Bit field optimizations/lowering at gimple level

A customer started to use scalar_storage_order but found bitfields were not as optimized for the opposite endian case. So found the easiest way to optimize this was to lower bitfield at the gimple level and add a few new peephole cases. This was made easier with the work that was being done for vector insert/extraction; reused some of the work there for the new peephole optimizations. I am hoping to get this most of this upstream in time for GCC 12.

Extending scalar_storage_order attribute to C++

This was done for a customer. There was not much enough testing was done but hoping to get this upstream for GCC 12. The main blocker here is just time and writing more testcases. There was already infrastructure blocking taking the address of the fields of packed struct, I reused that to support the attribute.

Microcode assembler/linker work

I cannot talk much about this except I took an existing microcode assembler and extended it to support object files. Also rewrote a lot of it from plain C to C++11 to make it easier to understand.

P4 language support

This is my current project, I am writing the lexer and parser from scratch as using flex and bison just don't cut it when dealing with error messages at all. Plus the current lexer does not support the preprocessor directives directly, you need to run the sources through a C preprocessor.

I cannot expand currently on what this compiler will be used for. But it will be open source.

Summary

Lots of work done in the last 11 years and more exciting things to come.

# posted by Andrew Pinski @ 4:13 PM 0 comments

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